library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity Contador is
	Generic(a : in integer := 3;
			b : in integer := 5);
    Port ( reset : in  STD_LOGIC;
			clk : in  STD_LOGIC;
			enable : in STD_LOGIC;
			load : in STD_LOGIC;
			data_load : in  STD_LOGIC_VECTOR (7 downto 0);
			salida : out  STD_LOGIC_VECTOR (7 downto 0));
end Contador;


architecture Behavioral of Contador is

	signal mienable, mireset, miload: std_logic;
	signal aux: integer;
	signal misalida,midata_load: std_logic_vector(7 downto 0);

begin

	process (clk,reset,mienable,load)                                  
  	begin
		if mireset = '1' then
			misalida <= x"00";
		elsif clk'event and clk = '1' then
			if miload = '1' then
				misalida <= midata_load;
			elsif mienable = '1' then
				misalida <= misalida +1;
			end if;
		end if;
  	end process;
	
	salida <= misalida;
	mireset <= reset;
   mienable <= enable;
	miload <= load;
	midata_load<=data_load;
	
end Behavioral;

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